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automotive data sheet rev. 1.0, 2013-08-08 TLD1121EL 1 channel high side current source infineon ? basic led driver
data sheet 2 rev. 1.0, 2013-08-08 TLD1121EL 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5en pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.1 en function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.2 internal supply pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.3 en unused . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3.1 en - pull up to vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3.2 en - direct connection to vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.4 electrical characteristics inte rnal supply / en pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 in_set pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.1 output current adjustment via rset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.2 smart input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7st pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.1 diagnosis selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.2 diagnosis output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.3 disable input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 load diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8.1 open load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8.2 short circuit to gnd detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.3 electrical characteristics in_set pin and load diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.1 protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.1.1 over load behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.1.2 reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 9.2 electrical characteristics power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 10 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 10.1 further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 11 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 12 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
pg-ssop14 type package marking TLD1121EL pg-ssop14 TLD1121EL data sheet 3 rev. 1.0, 2013-08-08 1 channel high side current source basic led driver TLD1121EL 1overview features ? 1 channel device with integrated output stage (cu rrent source), optimized to drive leds ? output current up to 360ma ? low current consumption in sleep mode ? pwm-operation supported via vs- and en-pin ? output current adjustable via external low power resistor and possibility to connect ptc resistor for led protection during over temperature conditions ? reverse polarity protection ? overload protection ? undervoltage detection ? open load and short circuit to gnd diagnosis ? wide temperature range: -40 c < t j < 150 c ? pg-ssop14 package with exposed heatslug ? green product (rohs compliant) ? aec qualified description the basic led driver TLD1121EL is a one channel high side driver ic with integrated ou tput stage. it is designed to control leds with a current up to 360 ma. in typical au tomotive applications the device is capable to drive i.e. 3 red leds with a current up to 180 ma, which is limit ed by thermal cooling aspects. the output current is controlled practically independent of load and supply voltage changes. table 1 product summary operating voltage v s(nom) 5.5 v? 40 v maximum voltage v s(max) v out(max) 40 v nominal output (load) current i out(nom) 180 ma when using a supply voltage range of 8v - 18v (e.g. automotive car battery). currents up to i out(max) possible in applications with low thermal resistance r thja maximum output (load) current i out(max) 360 ma; depending on thermal resistance r thja output current accuracy at r set = 12 k k lt 2250 7% current consumption in sleep mode i s(sleep,typ) 0.1 a
data sheet 4 rev. 1.0, 2013-08-08 TLD1121EL overview protective functions - esd protection - under voltage lock out - over load protection - over temperature protection - reverse polarity protection diagnostic functions - ol detection - sc to vs (indicated by ol diagnosis) - sc to gnd detection applications designed for exterior led lighting applications such as tail/ brake light, turn indicator, position light, side marker,... the device is also well suited for in terior led lighting applications such as ambient lighting, interior illumination and dash board lighting.
TLD1121EL block diagram data sheet 5 rev. 1.0, 2013-08-08 2 block diagram figure 1 basic block diagram output control out internal supply thermal protection current adjust TLD1121EL gnd en vs in_set status st gnds
data sheet 6 rev. 1.0, 2013-08-08 TLD1121EL pin configuration 3 pin configuration 3.1 pin assignment figure 2 pin configuration 11 12 13 14 TLD1121EL ep 10 4 3 2 1 5 nc st nc out en nc nc vs vs gnds 6 7 in_set nc 9 8nc gnd
TLD1121EL pin configuration data sheet 7 rev. 1.0, 2013-08-08 3.2 pin definitions and functions pin symbol input/ output function 1, 2 vs ? supply voltage; battery supply, connect a decoupling capacitor (100 nf - 1 f) to gnd 3eni enable pin 4nc? pin not connected 5gnds? 1) gnds; signal gnd, connect to gnd 1) connect all gnd-pins together. 6 in_set i/o input / set pin; connect a low power resistor to adjust the output current 7nc? pin not connected 8nc? pin not connected 9gnd? 1) ground 10 st i/o status pin 11 nc ? pin not connected 12 out o output 13 nc ? pin not connected 14 nc ? pin not connected exposed pad gnd ? 1) exposed pad; connect to gnd in application
data sheet 8 rev. 1.0, 2013-08-08 TLD1121EL general product characteristics 4 general product characteristics 4.1 absolute maximum ratings note: stresses above the ones listed here may cause perm anent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note: integrated protection functions are designed to prevent ic destruction under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. protection functions are not designed for continuous repetitive operation. absolute maximum ratings 1) t j = -40 c to +150 c; all voltages with respect to ground, positive current flowing into pi n for input pins (i), positive currents flowing out of the i/o and output pins (o) (unless otherwise specified) 1) not subject to production test, specified by design pos. parameter symbol limit values unit conditions min. max. voltages 4.1.1 supply voltage v s -16 40 v ? 4.1.2 input voltage en v en -16 40 v ? 4.1.3 input voltage en related to v s v en(vs) v s - 40 v s + 16 v ? 4.1.4 input voltage en related to v out v en - v out v en - v out -16 40 v ? 4.1.5 output voltage v out -1 40 v ? 4.1.6 power stage voltage v ps = v s - v out v ps -16 40 v ? 4.1.7 in_set voltage v in_set -0.3 6 v ? 4.1.8 status voltage v st -0.3 6 v ? currents 4.1.9 in_set current i in_set ? ? 2 8 ma ? diagnosis output 4.1.10 output current i out ?390ma? temperatures 4.1.11 junction temperature t j -40 150 c? 4.1.12 storage temperature t stg -55 150 c? esd susceptibility 4.1.13 esd resistivity to gnd v esd -2 2 kv human body model (100 pf via 1.5 k ) 2) 2) esd susceptibility, human body model ?hb m? according to ansi/ esda/jedec js-001-2011 4.1.14 esd resistivity all pins to gnd v esd -500 500 v cdm 3) 3) esd susceptibility, charged device model ?cdm? according to jesd22-c101e 4.1.15 esd resistivity corner pins to gnd v esd -750 750 v cdm 3)
TLD1121EL general product characteristics data sheet 9 rev. 1.0, 2013-08-08 4.2 functional range note: within the functional range the ic operates as de scribed in the circuit description. the electrical characteristics are specifi ed within the conditions given in the re lated electrical ch aracteristics table. 4.3 thermal resistance pos. parameter symbol limit values unit conditions min. max. 4.2.16 supply voltage range for normal operation v s(nom) 5.5 40 v ? 4.2.17 power on reset threshold v s(por) ?5v v en = v s r set =12k i out = 80% i out(nom) v out =2.5v 4.2.18 junction temperature t j -40 150 c? pos. parameter symbol limit values unit conditions min. typ. max. 4.3.1 junction to case r thjc ?810k/w 1) 2) 1) not subject to production test, specifi ed by design. based on simulation results. 2) specified r thjc value is simulated at natural convection on a cold plate setup (all pins and t he exposed pad are fixed to ambient temperature). t a = 85c, total power dissipation 1.5 w. 4.3.2 junction to ambient 1s0p board r thja1 ? ? 61 56 ? ? k/w 1) 3) t a =85c t a = 135 c 3) the r thja values are according to jedec jesd51-3 at natural c onvection on 1s0p fr4 board. the product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm 3 board with 70m cu, 300 mm 2 cooling area. total power dissipation 1.5 w distributed statically and ho mogenously over power stage. 4.3.3 junction to ambient 2s2p board r thja2 ? ? 45 43 ? ? k/w 1) 4) t a =85c t a = 135 c 4) the r thja values are according to jedec jesd51-5,-7 at natu ral convection on 2s2p fr4 board. the product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm 3 board with 2 inner copper layers (outside 2 x 70 m cu, inner 2 x 35m cu). where applicable, a thermal via array under the expos ed pad contacted the first inne r copper layer. total power dissipation 1.5 w distributed statically and homogenously over power stage.
data sheet 10 rev. 1.0, 2013-08-08 TLD1121EL en pin 5en pin the en pin is a dual function pin: figure 3 block diagram en pin note: the current consumption at the en-pin i en needs to be added to the total device current consumption. the total current consumption is the sum of the currents at the vs-pin i s and the en-pin i en . 5.1 en function if the voltage at the pin en is below a threshold of v en(off) the basic led driver ic will enter sleep mode. in this state all internal functions are switched off, the current consumption is reduced to i s(sleep) . a voltage above v en(on) at this pin enables the device after the power on reset time t por . figure 4 power on reset v en en output control internal supply v en t t 80% t por i out 100% t v s
TLD1121EL en pin data sheet 11 rev. 1.0, 2013-08-08 5.2 internal supply pin the en pin can be used to supply the internal logic. ther e are two typical application conditions, where this feature can be used: 1) in ?dc/dc control buck? co nfigurations, where the voltage v s can be below 5.5v. 2) in configurations, where a pwm signal is applied at the vbatt pin of a light module. the buffer capacitor c buf is used to supply the basic led driver ic during vbatt low ( v s low) periods. this feature can be used to minimize the turn-on time to the values specified in pos. 9.2.13 . otherwise, the power-on reset delay time t por ( pos. 5.4.7 ) has to be considered. the capacitor can be calculated using the following formula: (1) see also a typical application drawing in chapter 10 . figure 5 external circuit when applying a fast pwm signal on v batt c buf t low max () i en ls () v s v d1 ? v spor () ? -------------------------------------------------- - ? = r set c buf v batt gnd d 1 output control out internal supply thermal protection current adjust basic led driver gnd en vs in_set
data sheet 12 rev. 1.0, 2013-08-08 TLD1121EL en pin figure 6 typical waveforms when applying a fast pwm signal on v batt the parameter t on(vs) is defined at pos. 9.2.13 . the parameter t off(vs) depends on the load and supply voltage v batt characteristics. 5.3 en unused in case of an unused en pin, there are two different ways to connect it: 5.3.1 en - pull up to vs the en pin can be connected with a pull up resistor (e.g. 10 k ) to v s potential. in this configuration the basic led driver ic is always enabled. 5.3.2 en - direct connection to vs the en pin can be connected directly to the vs pin (i c always enabled). this configuration has the advantage (compared to the configuration described in chapter 5.3.1 ) that no additional external component is required. v batt t t 20% 80% t on(vs) i out 100% v en t switch off behavior depends on v batt and load characteristics
TLD1121EL en pin data sheet 13 rev. 1.0, 2013-08-08 5.4 electrical characteristics internal suppl y / en pin electrical characteristics internal supply / en pin unless otherwise specified: v s = 5.5 v to 40 v, t j = -40 c to +150 c, r set =12k all voltages with respect to ground, positive current flowing into pin for input pins (i ), positive currents flowing out of the i/o and output pins (o) (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 5.4.1 current consumption, sleep mode i s(sleep) ?0.12a 1) v en = 0.5 v t j < 85 c v s = 18 v v out = 3.6 v 5.4.2 current consumption, active mode i s(on) ? ? ? ? ? ? 1.4 0.75 1.5 ma 2) i in_set = 0a t j < 105 c v s = 18 v v out = 3.6v v en =5.5v v en =18v 1) r en = 10 k between vs and en-pin 5.4.3 current consumption, device disabled via st i s(dis,st) ? ? ? ? ? ? 1.4 0.65 1.4 ma 2) v s = 18 v t j < 105 c v st = 5 v v en =5.5v v en =18v 1) r en = 10 k between vs and en-pin 5.4.4 current consumption, device disabled via in_set i s(dis,in_set) ? ? ? ? ? ? 1.4 0.7 1.4 ma 2) v s = 18 v t j < 105 c v in_set = 5 v v en =5.5v v en =18v 1) r en = 10 k between vs and en-pin 5.4.5 current consumption, active mode in fault detection condition with st- pin unconnected i s(fault,stu) ? ? ? ? ? ? 1.7 1.1 1.8 ma 2) v s = 18 v t j < 105 c r set = 12 k v out = 18 v or 0 v v en =5.5v v en =18v 1) r en = 10 k between vs and en-pin
data sheet 14 rev. 1.0, 2013-08-08 TLD1121EL en pin 5.4.6 current consumption, active mode in fault detection condition with st- pin connected to gnd i s(fault,stg) ? ? ? ? ? ? 6.0 4.9 5.9 ma 2) v s = 18 v t j < 105 c r set = 12 k v out = 18 v or 0 v v st = 0 v v en =5.5v v en =18v 1) r en = 10 k between vs and en-pin 5.4.7 power-on reset delay time 3) t por ?? 25s 1) v s = v en =0 13.5 v v out(nom) = 3.6 0.3v i out =80% i out(nom) 5.4.8 required supply voltage for output activation v s(on) ?? 4v v en = 5.5 v v out = 3 v i out =50% i out(nom) 5.4.9 required supply voltage for current control v s(cc) ?? 5.2v v en = 5.5 v v out = 3.6 v i out 90% i out(nom) 5.4.10 en turn on threshold v en(on) ?? 2.5v? 5.4.11 en turn off threshold v en(off) 0.8 ? ? v ? 5.4.12 en input current during low supply voltage i en(ls) ?? 1.8ma 1) v s = 4.5 v t j < 105 c v en = 5.5 v 5.4.13 en high input current i en(h) ? ? ? ? ? ? ? ? 0.1 0.1 1.65 0.45 ma t j < 105 c v s = 13.5 v, v en = 5.5 v v s = 18 v, v en = 5.5 v v s = v en = 18 v 1) v s = 18 v, r en = 10 k between vs and en-pin 1) not subject to production test, specified by design 2) the total device current consumption is the sum of the currents i s and i en(h) , please refer to pos. 5.4.13 3) see also figure 4 electrical characteristics internal supply / en pin (cont?d) unless otherwise specified: v s = 5.5 v to 40 v, t j = -40 c to +150 c, r set =12k all voltages with respect to ground, positive current flowing into pin for input pins (i ), positive currents flowing out of the i/o and output pins (o) (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
TLD1121EL in_set pin data sheet 15 rev. 1.0, 2013-08-08 6 in_set pin the in_set pin is a multiple function pin for ou tput current definition, input and diagnostics: figure 7 block diagram in_set pin 6.1 output current ad justment via rset the current adjustment can be done by placing a low power resistor ( r set ) at the in_set pin to ground. the dimensioning of the resistor can be done using the formula below: (2) the gain factor k ( r set * output current) is specified in pos. 9.2.4 and pos. 9.2.5 . the current through the r set is defined by the resistor itse lf and the reference voltage v in_set(ref) , which is applied to the in_set during supplied device. 6.2 smart input pin the in_set pin can be connected via r set to the open-drain output of a c or to an external nmos transistor as described in figure 8 . this signal can be used to turn off the outp ut stage of the ic. a minimum in_set current of i in_set(act) is required to turn on the output stage. this feature is implemented to prevent glimming of leds caused by leakage currents on the in_set pin, see figure 11 for details. in addition, the in_set pin offers the diagnostic feedback informati on, if the status pin is co nnected to gnd. another dia gnostic possibility is shown in figure 9 , where the diagnosis information is provided via the st pin (refer to chapter 7 and chapter 8 ) to a micro controller. in case of a fault event with the st pin connected to gnd the in_set voltage is increased to v in_set(ol/sc) pos. 8.3.2 . therefore, the device has two voltage domains at the in_set-pin, which is shown in figure 12 . i in_set v in_set(ol/sc) in_set gnd v in_set logic high impedance r set k i out ----------- =
data sheet 16 rev. 1.0, 2013-08-08 TLD1121EL in_set pin figure 8 schematics in_set interface to c, diagnosis via in_set pin figure 9 schematics in_set interface to c, diagnosis via st pin the resulting switching times are shown in figure 10 : figure 10 switching times via in_set r set /2 microcontroller (e.g. xc866) out v ddp = 5 v current adjust in_set gnd basic led driver r set /2 in status st microcontroller (e.g. xc866) out v ddp = 5 v current adjust in_set gnd basic led driver in status st r set optional i in_ set t t 20% 80% t on(in_set ) i out 100% t off(in _ set)
TLD1121EL in_set pin data sheet 17 rev. 1.0, 2013-08-08 figure 11 i out versus i inset figure 12 voltage domains for in_set pin, if st pin is connected to gnd i in_set(act) i in_set [a] i out [ma] k = i outx * v in_set(ref) / i in_setx i outx i in_setx v in _s e t (ref ) m ax v in_ set(ol/sc)min v in_set v in _set(ol /sc)max normal operation and high temperature current reduction range diagnostic voltage range
data sheet 18 rev. 1.0, 2013-08-08 TLD1121EL st pin 7st pin the st pin is a multiple function pin. figure 13 block diagram st pin 7.1 diagnosis selector if the status pin is unconnected or connected to gnd via a high ohmic resistor ( v st to be below v st(l) ), the st pin acts as diagnosis output pin. in norma l operation (device is activated) the st pin is pulled to gnd via the internal pull down current i st(pd) . in case of an open load or short circuit to gnd condition the st pin is switched to v st(ol/sc) after the open load or short circuit dete ction filter time ( pos. 8.3.9 , pos. 8.3.12 ). if the device is operated in pwm operation via the vs an d/or en pins the st pin should be connected to gnd via a high ohmic resistor (e.g. 470k ) to ensure proper device behavior duri ng fast rising vs and/or en slopes. if the st pin is shorted to gnd the diagnostic feed back is performed via the in_set-pin, which is shown in chapter 6.2 and chapter 8 . 7.2 diagnosis output if the status pin is unconne cted or connected to gnd via a high ohmic resistor ( v st to be below v st(l) ), it acts as a diagnostic output. in case of a fault c ondition the st pin rises its voltage to v st(ol/sc) ( pos. 8.3.7 ). details are shown in chapter 8 . 7.3 disable input if an external voltage higher than v st(h) ( pos. 8.3.5 ) is applied to the st pin, th e device is switched off. this function is used for applications, where multiple drivers should be used for one light function. it is possible to combine the drivers? fault diagnosis via the st pins. if a single led chain fails , the entire light function is switched off. in this scenario e.g. the diagnostic circuit on th e body control module can easily distinguish between the two cases (normal load or load fault), because nearly no curren t is flowing into the led module during the fault scenario - the drivers consume a current of i s(fault,stu) ( pos. 5.4.5 ) or i s(dis,st) ( pos. 5.4.3 ). as soon as one led chain fails, the st -pin of this device is switched to v st(ol/sc) . the other devices used for the same light function can be connected toge ther via the st pins. this leads to a switch off of all devices connected together. application examples are shown in chapter 10 . i st(ol/sc) v st st output control fault no fault v st(ol/sc) i st(pd) fault no fault
TLD1121EL st pin data sheet 19 rev. 1.0, 2013-08-08 figure 14 switching times via st pin v st t t 20% 80% t on(st) i out 100% t off( st)
data sheet 20 rev. 1.0, 2013-08-08 TLD1121EL load diagnosis 8 load diagnosis 8.1 open load an open load diagnosis feature is integrated in the tld112 1el driver ic. if there is an open load on the output, the output is turned off. the potential on the in_set pin rises up to v in_set(ol/sc) . this high voltage can be used as input signal for an c as shown in figure 9 . the open load status is not la tched, as soon as the open load condition is no longer present, the output stage will be turned on aga in. an open load conditio n is detected, if the voltage drop over the output stage v ps is below the th reshold according pos. 8.3.10 and a filter time of t ol is passed. figure 15 in_set behavior during open load condition with st pin connected to gnd t v s ?v ps(ol ) t ol v out t v f v in_ set(ref ) v in _set(ol /sc) v s v in_set open load occurs open load disappears t in _set (re se t)
TLD1121EL load diagnosis data sheet 21 rev. 1.0, 2013-08-08 figure 16 in_set and st behavior during open load condition (st unconnected) 8.2 short circuit to gnd detection the TLD1121EL has an integrated sc to gnd detection. if th e output stage is turned on and the voltage at the output falls below v out(sc) the potential on the in_set pin is increased up to v in_set(ol/sc) after t sc , if the st pin is connected to gnd. if the st is open or connected to gnd via a high ohmic resistor the fault is indicated on the st pin according to chapter 7 after t sc . more details are shown in figure 18 . this condition is not latched. for detecting a normal condition after a short circ uit detection an output current according to i out(sc) is driven by the channel. t v s ?v ps(ol) t ol v out v f v s open load occurs open load disappears t in_set(reset) v st t v st(ol /sc) v in_set t v in _set(ref )
data sheet 22 rev. 1.0, 2013-08-08 TLD1121EL load diagnosis figure 17 in_set behavior during short circuit to gnd condition with st connected to gnd and v den > v den(act) figure 18 in_set and st behavior during short circuit to gnd condition (st unconnected) t v out (s c) t sc v out v in_set t v f v in _set(ref ) v in _set(ol /sc) t in_ set( re se t) short circuit occurs short circuit disappears t v out (s c) t sc v out v st t v f v st(ol/sc) t in _set (re se t) short circuit occurs short circuit disappears v in_set t v in_ set(ref )
TLD1121EL load diagnosis data sheet 23 rev. 1.0, 2013-08-08 8.3 electrical characteristics in _set pin and load diagnosis electrical characteristics in _set pin and load diagnosis unless otherwise specified: v s = 5.5 v to 40 v, t j = -40 c to +150 c, r set = 12 k , all voltages with respect to ground, positive current flowing into pin for input pins (i ), positive currents flowing out of the i/o and output pins (o) (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 8.3.1 in_set reference voltage v in_set(ref) 1.19 1.23 1.27 v 1) v out =3.6v t j = 25...115 c 8.3.2 in_set open load/short circuit voltage v in_set(ol/sc) 4? 5.5v 1) v s > 8 v t j = 25...150 c v s = v out (ol) or v outx = 0 v (sc) 8.3.3 in_set open load/short circuit current i in_set(ol/sc) 1.5 ? 7.4 ma 1) v s > 8 v t j = 25...150 c v in_set = 4 v v s = v out (ol) or v out = 0v (sc) 8.3.4 st device turn on threshold (active low) in case of voltage applied from external (st-pin acting as input) v st(l) 0.8 ? ? v ? 8.3.5 st device turn off threshold (active low) in case of voltage applied from external (st-pin acting as input) v st(h) ?? 2.5v? 8.3.6 st pull down current i st(pd) ?? 15a v en =5.5v v st =0.8v 8.3.7 st open load/short circuit voltage (st-pin acting as diagnosis output) v st(ol/sc) 4? 5.5v 1) v s > 8 v t j = 25...150 c r st = 470 k v s = v out (ol) or v out = 0v (sc) 8.3.8 st open load/short circuit current (st-pin acting as diagnosis output) i st(ol/sc) 100 ? 220 a 1) v s > 8 v t j = 25...150 c v st = 2.5 v v s = v out (ol) or v out = 0v (sc) 8.3.9 ol detection filter time t ol 10 22 35 s 1) v s >8v 8.3.10 ol detection voltage v ps(ol) = v s - v out v ps(ol) 0.2 ? 0.4 v v s >8v 8.3.11 short circuit to gnd detection threshold v out(sc) 0.8 ? 1.4 v v s >8v 8.3.12 sc detection filter time t sc 10 22 35 s 1) v s > 8 v
data sheet 24 rev. 1.0, 2013-08-08 TLD1121EL load diagnosis 8.3.13 in_set diagnosis reset time t in_set(reset) ?5 20s 1) v s > 8 v 8.3.14 sc detection current in case of unconnected st- pin i out(sc,stu) 100 200 300 a v s > 8 v v out = 0 v 8.3.15 sc detection current in case of st-pin shorted to gnd i out(sc,stg) 0.1 2 4.75 ma v s > 8 v v out = 0 v v st = 0 v 8.3.16 in_set activation current without turn on of output stage i in_set(act) 2 ? 15 a see figure 11 1) not subject to production test, specified by design electrical characteristics in _set pin and load diagnosis (cont?d) unless otherwise specified: v s = 5.5 v to 40 v, t j = -40 c to +150 c, r set = 12 k , all voltages with respect to ground, positive current flowing into pin for input pins (i ), positive currents flowing out of the i/o and output pins (o) (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
TLD1121EL power stage data sheet 25 rev. 1.0, 2013-08-08 9 power stage the output stage is realized as high side current source with a current of 360 ma. during off state the leakage current at the output stage is minimized in order to prevent a slightly glowing led. the maximum current of the channel is limited by the power dissipation and used pcb cooling areas (which results in the applications r thja ). for an operating current control loop the supply and output voltages according to the following parameters have to be considered: ? required supply voltage for current control v s(cc) , pos. 5.4.9 ? voltage drop over output stage during current control v ps(cc) , pos. 9.2.6 ? required output voltage for current control v out(cc) , pos. 9.2.7 9.1 protection the device provides embedded protective functions, wh ich are designed to prevent ic destruction under fault conditions described in this data sheet. fault condit ions are considered as ?out side? normal operating range. protective functions are neither designed fo r continuous nor for repetitive operation. 9.1.1 over load behavior an over load detection circuit is integrated in the basi c led driver ic. it is realized by a temperature monitoring of the output stage (out). as soon as the junction temperature exceed s the current reduction temperature threshold t j(crt) the output current will be reduced by the device by re ducing the in_set reference voltage v in_set(ref) . this feature avoids led?s flickering during static output overload conditions. furtherm ore, it protects leds against over temperature, which are mounted thermally cl ose to the device. if the devic e temperature still increases, the output curr ent decreases close to 0 a. as soon as the device cools down the output current rises again. figure 19 output current reduction at high temperature note: this high temperature output current reduction is r ealized by reducing the in_set reference voltage voltage ( pos. 8.3.1 ). in case of very high power loss applied to th e device and very high junction temperature the output current may drop down to i out = 0 ma, after a slight cooling down the current increases again. 9.1.2 reverse battery protection the TLD1121EL has an integrated reverse battery protection fe ature. this feature protects the driver ic itself, but also connected leds. the output reverse current is limited to i outx(rev) by the reverse battery protection. t j i out t j(crt) v in_set
data sheet 26 rev. 1.0, 2013-08-08 TLD1121EL power stage note: due to the reverse battery protection a reverse protec tion diode for the light module may be obsolete. in case of high iso-pulse requirements and only minor protec ting components like capacitors a reverse protection diode may be reasonable. the external protection circuit needs to be verified in the application. 9.2 electrical charact eristics power stage electrical characteristics power stage unless otherwise specified: v s = 5.5 v to 18 v, t j = -40 c to +150 c, v out = 3.6 v, all voltages with respect to ground, positive current flowing into pin for input pins (i ), positive currents flowing out of the i/o and output pins (o) (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max. 9.2.1 output leakage current i out(leak) ? ? ? ? 21 9 a v en = 5.5 v i in_set = 0 a v out =2.5v t j = 150 c 1) t j = 85 c 9.2.2 output leakage current in boost over battery setup -i out(leak,b2b) ??150a 1) v en = 5.5 v i in_set =0a v out = v s = 40 v 9.2.3 reverse output current -i out(rev) ??3a 1) v s = -16 v output load: led with break down voltage <-0.6v 9.2.4 output current accuracy limited temperature range k lt 2092 1800 2250 2250 2408 2700 1) t j = 25...115 c v s = 8...18 v v ps = 2 v r set = 12 k r set = 30 k 9.2.5 output current accuracy over temperature k all 1980 1710 2250 2250 2520 2790 1) t j = -40...115 c v s = 8...18 v v ps = 2 v r set = 6...12 k r set = 30 k 9.2.6 voltage drop over power stage during current control v ps(cc) = v s - v out v ps(cc) 0.75 ? ? v 1) v s = 13.5 v r set = 12 k i out 90% of ( k lt(typ) / r set ) 9.2.7 required out put voltage for current control v out(cc) 2.3 ? ? v 1) v s = 13.5 v r set = 12 k i out 90% of ( k lt(typ) / r set ) 9.2.8 maximum output current i out(max) 360 ? ? ma r set = 4.7 k the maximum output current is limited by the thermal conditions. please refer to pos. 4.3.1 - pos. 4.3.3
TLD1121EL power stage data sheet 27 rev. 1.0, 2013-08-08 9.2.9 st turn on time t on(st) ??15s 2) v s = 13.5 v r set = 12 k st l i out = 80% of ( k lt(typ) / r set ) 9.2.10 st turn off time t off(st) ??10s 2) v s = 13.5 v r set = 12 k st h i out = 20% of ( k lt(typ) / r set ) 9.2.11 in_set turn on time t on(in_set) ??15s v s = 13.5 v i in_set = 0 100 a i out = 80% of ( k lt(typ) / r set ) 9.2.12 in_set turn off time t off(in_set) ??10s v s = 13.5 v i in_set =100 0a i out = 20% of ( k lt(typ) / r set ) 9.2.13 vs turn on time t on(vs) ??20s 1) 3) v en =5.5v r set = 12 k v s = 0 13.5 v i out = 80% of ( k lt(typ) / r set ) 9.2.14 current reduction temperature threshold t j(crt) ?140?c 1) i out = 95% of ( k lt(typ) / r set ) 9.2.15 output current during current reduction at high temperature i out(crt) 85% of ( k lt(typ) / r set ) ??a 1) r set =12k t j = 150 c 1) not subject to production test, specified by design 2) see also figure 14 3) see also figure 6 electrical characteristics power stage (cont?d) unless otherwise specified: v s = 5.5 v to 18 v, t j = -40 c to +150 c, v out = 3.6 v, all voltages with respect to ground, positive current flowing into pin for input pins (i ), positive currents flowing out of the i/o and output pins (o) (unless otherwise specified) pos. parameter symbol limit values unit conditions min. typ. max.
data sheet 28 rev. 1.0, 2013-08-08 TLD1121EL application information 10 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. figure 20 application diagram note: this is a very simplified example of an application circuit. in case of high iso-pulse requirements a reverse protection diode may be used for le d protection. the function must be ve rified in the real application. 10.1 further application information ? for further information you may contact http://www.infineon.com/ r set microcontroller (e.g. xc866) out in light module v batt out output control out internal supply thermal protection current adjust basic led driver en vs in_set status st gnd gnds eventually to other basic led driver 470k * * in case pwm via vs or en is performed . ** for emi improvement, if required, 10nf c mo d =2.2f is o-p u lse protection circuit depending on requirements 10k c vs =4.7nf 4.7n f**
TLD1121EL package outlines data sheet 29 rev. 1.0, 2013-08-08 11 package outlines figure 21 pg-ssop14 green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). pg-ssop-14-1,-2,-3-po v02 1 7 14 8 14 17 8 14x 0.25 ?.05 2) m 0.15 d c a-b 0.65 c stand off 0 ... 0.1 (1.45) 1.7 max. 0.08 c a b 4.9 ?.1 1) a-b c 0.1 2x 1) does not include plastic or metal protrusion of 0.15 max. per side 2) does not include dambar protrusion bottom view ?.2 3 ?.2 2.65 0.2 ?.2 d 6 m d 8x 0.64 ?.25 3.9 ?.1 1) 0.35 x 45? 0.1 cd +0.06 0.19 8 ? max. index marking exposed diepad dimensions in mm for further information on alternativ e packages, please vi sit our website: http://www.infineon.com/packages .
data sheet 30 rev. 1.0, 2013-08-08 TLD1121EL revision history 12 revision history revision date changes 1.0 2013-08-08 inital revision of data sheet
edition 2013-08-08 published by infineon technologies ag 81726 munich, germany ? 2013 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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